This application is based on Japanese Patent Application No. Hei. 9-332068 filed on Dec. 2, 1997, the contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a verification method, a verification apparatus and a recording medium of a neural network, and more particularly to a verification method, a verification apparatus and a recording medium of a neural network for setting synaptic weight so that an error between a neural network output signal and a teacher output signal falls within an a tolerance.
2. Description of the Related Art
Hitherto, there has been known a neural circuit network (also called as a neural network) comprising an input layer, an intermediate layer, an output layer, each layer having one or more units for generating transmission signals, and synapses connecting the units in the respective layers to transmit the transmission signals. In the neural network, each synapse has synaptic weight and a desirable input/output characteristic may be realized by adequately changing the synaptic weight through a learning process.
It is noted that the learning of the neural network is a process of calculating a network output signal when a teacher input signal is inputted to the neural network and of minimizing an error between a teacher output signal and the network output signal, e.g., a sum of square error, by changing each synaptic weight based on the result of comparison between the network output signal and the teacher output signal which represents the characteristic to be realized.
Then, having a tolerance of xc2x1xcex5 with respect to the teacher output signal t(x) as shown in FIG. 13A, the learning is carried out such that the error (n(x)xe2x88x92t(x)) between the network output signal n(x) and the teacher output signal t(x) falls within this tolerance xc2x1xcex5(|n(x)xe2x88x92t(x)| less than xcex5) with respect to all actually possible input signals as shown in FIG. 13B.
By the way, while the neural network is being widely applied to pattern recognition, data processing and others, it has come to be applied more in the control of air-conditioners. When the neural network is thus incorporated in a product to make various controls, it is necessary to assure that a correct output signal is always outputted from the neural network with respect to any input signal which may be inputted to the neural network.
However, because the output characteristic of the neural network in which the synaptic weight is set by learning cannot be described by a simple logic of if-then rule and the like, it is difficult to verify it by internal analysis. Therefore, a method of preparing signals (test data) which might be inputted as much as possible and of actually inputting those signals to confirm whether or not a desired output signal is obtained one by one has been adopted in general.
However, when the check is carried out by actually inputting the test data as described above, there has been a possibility that the operation of the neural network is assured only at check points xp and a part ER that exists between the check points xp and deviates from the tolerance is missed as shown in FIG. 13C. Although it might be possible to prevent such possibility by increasing test data, there has been a possibility that it takes time for the verification as the test data is increased. The points (ranges) to be checked also increase exponentially as the types of input signals increase. Specifically, when the input signal is a continuous signal, points to be checked exist infinitely. That is, it is unable to check most of the points and the assurance for all input signals cannot be made no matter how much test data is increased.
It is an object of the invention to solve the above-mentioned problems by assuring the operation of a neural network for any input signals, which might be inputted.
A neural network verification method or a verification apparatus of the invention verifies the neural network by setting a range of each input signal inputted to an input layer respectively as one-dimensional input signal space, by dividing a m-(m is an integer of 1 or more) dimensional input signal space to the input layer into a plurality of input signal subspaces and by judging an error between a network output signal and a teacher output signal per such input signal subspace.
The invention enables the whole input signal space to be verified without omission because it checks (judges the error) per input signal subspace, unlike the check made by test data which checks certain points within the input signal.